1. Field of the Invention
The present invention relates to a charged particle beam exposure apparatus and, more particularly, to an exposure apparatus which draws a pattern on a substrate with a charged particle beam, a method of measuring the line width of the pattern formed by the exposure apparatus, and a device manufacturing method using the exposure apparatus.
2. Description of the Related Art
There has conventionally, generally been used a technique which can manufacture a device such as a semiconductor integrated circuit having a micropattern and high integration degree by raster-scanning a substrate with, e.g., a charged particle beam.
For example, Japanese Patent Laid-Open No. 2005-32838 discloses a charged particle beam drawing method of performing adjustment to make the dimension, in the raster scanning direction, of a charged particle beam on the substrate smaller than that in a direction perpendicular to the raster scanning direction. This method is applicable to an electron beam exposure apparatus which outputs a raster scanning type electron beam.
FIG. 13 is an explanatory view for explaining an arrangement example of a conventional raster scanning type electron beam exposure apparatus. This apparatus causes an electron source S to emit an electron beam. The electron beam forms an image of the electron source S via an electron lens L1. The image of the electron source S is reduced and projected onto a wafer W via a reduction electro-optic system including electron lenses L2 and L3.
A blanker B is an electro-static deflector positioned at the image of the electron source S formed by the electron lens L1. The blanker B controls whether to allow the electron beam to strike the wafer W. In a case that the blanker B does not allow the electron beam to strike the wafer W, it deflects the electron beam and a blanking aperture BA positioned at the pupil of the reduction electro-optic system shields the deflected electron beam. In addition, an electro-static deflector DEF deflects the electron beam to scan the wafer W with it.
A method of drawing a pattern on the wafer W by raster scanning will be explained with reference to FIG. 14. FIG. 14 is an explanatory view for explaining a method of drawing a pattern on the wafer W by raster scanning. In one example in which a 48-nm isolated line is to be drawn as a pattern, a drawing region is divided into pixels (pixel pitch=16 nm).
While the deflector DEF deflects the electron beam to scan the drawing region in the X direction, the blanker B controls the electron beam to strike each pixel of the pattern. After completing scanning in the X direction, the electron beam steps in the Y direction. The blanker B controls irradiation of the electron beam with respect to the drawing region to draw the pattern while scanning it in the X direction again.
Line width control of a line pattern will be explained with reference to FIGS. 15A and 15B. FIGS. 15A and 15B are explanatory views (graphs) for explaining line width control of a line pattern. FIG. 15A shows an example of line width control in drawing, e.g., a 48-nm isolated line. The formation of, e.g., a line having a width of 48 nm uses three pixels, the doses (exposure times) of which are equalized.
FIG. 15B exemplifies a case in which a 45-nm isolated line, for example, is drawn. To form a pattern having a line width of 45 nm, three pixels are used like the 48-nm isolated line. However, the dose (exposure time) of a pixel positioned at the line edge is reduced to, e.g., 13/16 that of the other pixels. That is, the dose of a pixel positioned at the line edge is made variable to control a line width (line width imparting amount) that the pixel imparts to the line pattern, thereby forming a pattern having a target line width.
However, in drawing a 45-nm isolated line by pattern line width control, the dose (exposure time) of a pixel positioned at the line edge need not always be 13/16 that of the other pixels.
That is, if 1-nm grid patterns are designed, sixteen types of dose patterns are possible. As shown in FIG. 16, assuming that the exposure cycle is 10 ns and the maximum exposure time is 8 ns, there are sixteen types of dose patterns. All the dose patterns are required to have a line width of 45 nm and to move in steps of 1 nm.
Unfortunately, it is generally difficult to form a required pattern on the wafer in practice. To correct any formation failure, it is necessary to measure the actual line width of each pattern.
However, a long time is taken to measure the line width in offline after actually exposing and developing the resist, resulting in poor efficiency.